Zohming Liana | Engineering | Best Researcher Award

Mr. Zohming Liana | Engineering | Best Researcher Award

NIT Silchar | India

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Early Academic Pursuits ๐Ÿ“š

Mr. Zohming Liana's academic journey began in 2009 when he completed his high school education at Maubawk High School under the Mizoram Board of School Education. Demonstrating a keen interest in the sciences, he pursued his intermediate studies at Synod Higher Secondary School, focusing on Physics, Chemistry, and Mathematics. This solid foundation paved the way for his enrollment in the B.Tech program at PES College of Engineering, Mandya, Karnataka, where he specialized in Electronics and Communication Engineering, graduating with an impressive 8.48 CGPA in 2015.

Professional Endeavors ๐Ÿ’ผ

Upon completing his B.Tech, Mr. Liana continued his academic progression by enrolling in the M.Tech program at the National Institute of Technology (NIT), Mizoram. There, he specialized in Microelectronics and VLSI System Design, earning a 7.73 CGPA in 2019. His doctoral journey took him to NIT Silchar, where he pursued a Ph.D. focused on the "Modeling and Simulation of Graphene Nanoribbon Vertical TFET," under the supervision of Prof. Brinda Bhowmick and Dr. Bijit Choudhuri. His research utilized advanced software tools such as Silvaco ATLAS and Virtuoso Cadence.

Contributions and Research Focus ๐Ÿง‘โ€๐Ÿ”ฌ

Mr. Liana has made significant contributions to the field of electronics and communication engineering. His research primarily revolves around the modeling and simulation of semiconductor devices, with a particular emphasis on Graphene Nanoribbon Vertical Tunnel FETs (TFETs). His work includes projects like "Modeling for Minimization of Leakage in DG SOI NanoFET," guided by Dr. Rudra Sankar at NIT Mizoram, employing software such as Sentaurus TCAD, MATLAB, and Cadence.

Accolades and Recognition ๐Ÿ…

Throughout his academic and professional journey, Mr. Liana has achieved notable recognition. He qualified for the National Eligibility Test in 2019 and has published extensively in esteemed international journals. His publications cover various aspects of semiconductor device performance, including the impact of graphene channels, gas sensing stability, and RF energy harvesting. He has also been granted a South African patent and contributed to a book chapter on advanced semiconductor devices.

Impact and Influence ๐ŸŒ

Mr. Liana's research has had a considerable impact on the field of semiconductor device engineering. His work on the performance analysis of Graphene Nanoribbon Vertical Tunnel FETs has been published in high-impact journals, influencing both academic research and practical applications in microelectronics. His participation in international conferences has further disseminated his findings to a global audience.

Legacy and Future Contributions ๐ŸŒŸ

Looking ahead, Mr. Liana's contributions to the field of electronics and communication engineering are poised to leave a lasting legacy. His ongoing research and innovative approach to semiconductor device modeling continue to push the boundaries of what is possible in microelectronics. As he progresses in his career, his work is expected to drive further advancements in the development of efficient, high-performance electronic devices, solidifying his role as a leading figure in his field.

 

Publications ๐Ÿ“šย 

Device and Circuit-Level Performance Evaluation of DG-GNR-DMG Vertical Tunnel FET

  • ๐Ÿ“” Journal: Micro and Nanostructures
  • ๐Ÿ“… Year: 2024
  • ๐Ÿ‘ฅ Contributors: Zohming Liana, Manas Ranjan Tripathy, Bijit Choudhuri, Brinda Bhowmick

Sensitivity Analysis of a Double Source Stack Lateral TFET-Based Gas Sensor

  • ๐Ÿ“” Journal: ECS Journal of Solid State Science and Technology
  • ๐Ÿ“… Year: 2024
  • ๐Ÿ‘ฅ Contributors: Mili, G., Liana, Z., Bhowmick, B.

Analysis of the Impact of Interface Trap Charges on the Analog/RF Performance of a Graphene Nanoribbon Vertical Tunnel FET

  • ๐Ÿ“” Journal: Journal of Electronic Materials
  • ๐Ÿ“… Year: 2023
  • ๐Ÿ‘ฅ Contributors: Liana, Z., Choudhuri, B., Bhowmick, B.

Sensitivity and Stability Analysis of Double-Gate Graphene Nanoribbon Vertical Tunnel FET for Different Gas Sensing

  • ๐Ÿ“” Journal: ECS Journal of Solid State Science and Technology
  • ๐Ÿ“… Year: 2023
  • ๐Ÿ‘ฅ Contributors: Liana, Z., Choudhuri, B., Bhowmick, B.

Drift Diffusion and Advance Hydrodynamic Simulation for the Design of Double-Gate SOI MOSFET in Nano-Scale Regime

  • ๐Ÿ“” Conference: 2019 2nd International Conference on Advanced Computational and Communication Paradigms (ICACCP 2019)
  • ๐Ÿ“… Year: 2019
  • ๐Ÿ‘ฅ Contributors: Liana, Z., Khiangte, L., Dash, S., Dhar, R.S.

 

 

 

Pankaj Kumar | Engineering | Best Researcher Award

Dr. Pankaj Kumar | Engineering | Best Researcher Award

Graphic Era Deemed to be University | India

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Early Academic Pursuits

Dr. Pankaj Kumar is an accomplished academic in the field of electronics and communication engineering. His early academic journey laid a strong foundation for his expertise and research interests. He pursued his undergraduate and postgraduate studies with a focus on electronics, honing his skills and knowledge in semiconductor devices and circuit design.

Professional Endeavors

Currently serving as an Assistant Professor (Research) in the Department of Electronics and Communication Engineering at Graphic Era Deemed to be University, Dehradun, India, Dr. Kumar has been actively involved in both teaching and research. His professional endeavors extend beyond academia, contributing to significant advancements in semiconductor technology and electronic devices.

Contributions and Research Focus

Dr. Kumar's research primarily focuses on the development and optimization of Tunnel Field-Effect Transistors (TFETs) and other advanced semiconductor devices. He has extensively worked on gate-all-around (GAA) TFETs, investigating their performance, reliability, and potential applications in biosensing and radiation-hardened electronics. His contributions include the development of models for the impact of various environmental and operational stresses on these devices.

Accolades and Recognition

Dr. Kumar has been recognized for his prolific contributions to the field through numerous publications in prestigious journals. His work has been featured in IEEE Sensors Journal, IEEE Transactions on Nanotechnology, Microelectronics Reliability, and Scientific Reports (Nature), among others. Additionally, he has presented his research findings at various international conferences, further establishing his reputation as a leading researcher in his domain.

Impact and Influence

The impact of Dr. Kumar's research is evidenced by his numerous publications and the citations they have garnered. His work on the detection of cancer using TFET biosensors and the study of radiation effects on semiconductor devices has significant implications for medical diagnostics and the development of radiation-hardened electronics. His research findings contribute to the broader understanding and advancement of semiconductor technology, influencing both academic research and practical applications.

Legacy and Future Contributions

Dr. Pankaj Kumar's legacy is marked by his persistent pursuit of innovation and excellence in electronics and communication engineering. His ongoing research promises further advancements in TFET technology and its applications. As he continues to explore new frontiers in semiconductor devices, his contributions are expected to pave the way for next-generation electronic systems with enhanced performance, reliability, and functionality.

 

Notable Publications

Trade-off analysis between gm/IDย and fT of GNR-FETs with single-gate and double-gate device structure 2024

Breast Cancer and Prostate Cancer Detection Considering Transconductance Generation Factor (gm/IDS) as a Sensing Metric for IIIโ€“V Gate-All-Around Tunnel FET Biosensor 2023 (1)

Impact of hole trap-detrap mechanism on X-ray irradiation induced threshold voltage shift of radiation-hardened GAA TFET device 2023 (1)

Assessment of interface trapped charge induced threshold voltage hysteresis effect in gate-all-around TFET 2023 (1)

Assessment of Negative Bias Temperature Instability Due to Interface and Oxide Trapped Charges in Gate-All-Around TFET Devices 2023 (2)