FTD Infocom Pvt Ltd | India
Mr. Patruni Rajshekhar Rao is an avionics research professional whose work integrates test and verification engineering, data analysis, and safety-critical system evaluation across aerospace platforms. His contributions span functional RTL verification, aerospace data analysis, and reliability assessment of embedded systems. His early work involved functional verification of ARINC818 protocol IP cores, where he designed assertion-based test benches using VHDL and file-driven debugging to enhance precision in timing-sensitive validation. He later expanded into flight data analysis for advanced aircraft systems such as the SARAS platform, performing hardware–software integration testing, developing low-level test cases, and analyzing stall-warning system performance. His research also includes pioneering efforts in software health management, where he explored self-healing software systems using AI-driven methods to automate fault detection and recovery in avionics architectures. He has contributed to safety-critical processes aligned with DO-178B and DO-254 standards, including MCDC-level testing for auto-generated code in A-FADEC systems and performing dynamic and static analysis to identify and mitigate software defects. Across conferences and journals, he has published studies on verification methodologies, safety criteria, IP-core validation procedures, and AI-based static analysis, reinforcing his role in advancing dependable avionics engineering.
Profile : Scopus
Featured Publications
Nanda, M., & Rao, P. R. (2018, May 17). Implementation and verification of an asynchronous FIFO under boundary conditions (Paper ID: NCESC18-181). National Conference on Electronics, Signals and Communication (NCESC-2018), GSSS Institute of Engineering & Technology for Women, Mysore.
Nanda, M., Jayanthi, J., & Rao, P. R. (2018, May 18–19). Aerospace compliant test bench to verify critical aerospace functionalities (Paper ID: CRP18-1007). 3rd International Conference on Recent Trends in Electronics, Information and Communication Technology (RTEICT-2018), Department of Electronics and Communication Engineering, SVCE, Bangalore.
Nanda, M., & Rao, P. R. (2018). An approach for generating self-checking test bench. International Journal for Research in Applied Science and Engineering Technology, 6(6). (Paper ID: IJRASET17914).
Nanda, M., & Rao, P. R. (2018). Aerospace data bus safety criteria as per DO-254. International Journal of Research and Innovation in Applied Science, 3(6).
Nanda, M., & Rao, P. R. (2018). A procedure to verify and validate an FPGA level testing as per DO-254. International Journal of Research and Innovation in Applied Science, 3(6).
Nanda, M., & Rao, P. R. (2018). Verification cases and procedure for IP-core development. International Journal of Engineering Research and Advanced Technology. (ISSN 2454-6135).